74LS273 Octal Dual Flip-Flop
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These monolithic, positive-edge-triggered flipflops utilize TTL circuitry to implement D-type flip-flop logic with a direct clear input. Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock input is at either the high or low level, the D input signal has no effect ar the output. These flip-flops are guaranteed to respond to clock frequencies ranging form 0 to 30 megahertz while maximum clock frequency is typically 40 megahertz. Typical power dissipation is 39 milliwatts per flip-flop for the ′273 and 10 milliwatts for the ′LS273.
| IC code | No. of pins | Description |
| 74LS273 | 20 | Octal Tras latch - 3 state output |
Data Sheet: http://www.ti.com/lit/ds/sdls090/sdls090.pdf
| leg distance | 2.54mm |
| active case colour | Black |
| active mount type | Through Hole |
| active marking code type | Number code |
| active connector type | Solder Legs |
| component package | DIL |
| max temperature | 70°C |
| active number of legs | 20 count |
| diameter of leg | 0.45mm |
| unique marking code | 74LS273 |